Floating-point Library for Integer Processors
Software support for floating-point arithmetic on integer processors.
FLIP is a C library that provides a software support for binary32 floating-point
arithmetic on integer processors. This library is particularly targeted to VLIW or DSP
processors (that is, embedded systems),
and has been validated on VLIW integer processors like those of the ST200 family from
STMicroelectronics.
This library provides software implementation for the five basic arithmetic operations
(addition, subtraction, multiplication, division, and square root)
with subnormal numbers support, and for the four rounding-direction
attributes (RoundTiesToEven, RoundTowardPositive, RoundTowardNegative, RoundTowardZero)
required by the IEEE 754-2008 standard.
FLIP is contributed by
the Arénaire team (INRIA Grenoble - Rhône-Alpes)
within the LIP laboratory at ENS Lyon.
The main developers of the latest version (FLIP-1.0) are
Claude-Pierre Jeannerod
and Guillaume Revy.
Performances
FLIP has been validated on ST231 VLIW processor. Performances on ST231 can be found here.
Download
Example
The following program can be downloaded here.
#include<stdio.h>
#include<flip.h>
int main(void)
{
float a = 17.0128421783447265625000000f;
float b = 1.24564564228057861328125000f;
printf("a = %1.30f\n",a);
printf("b = %1.30f\n",b);
printf("add(a,b) = %1.30f\n",flip_addf(a,b));
printf("sub(a,b) = %1.30f\n",flip_subf(a,b));
printf("mul(a,b) = %1.30f\n",flip_mulf(a,b));
printf("div(a,b) = %1.30f\n",flip_divf(a,b));
printf("sqrt(a) = %1.30f\n",flip_sqrtf(a));
printf("sqrt(b) = %1.30f\n",flip_sqrtf(b));
return 0;
}
To compile, just type in a terminal:
$ gcc -o test-flip test-flip.c -lflip
The result of this program is:
$ ./test-flip
a = 17.012842178344726562500000000000
b = 1.245645642280578613281250000000
add(a,b) = 18.258487701416015625000000000000
sub(a,b) = 15.767196655273437500000000000000
mul(a,b) = 21.191972732543945312500000000000
div(a,b) = 13.657850265502929687500000000000
sqrt(a) = 4.124662876129150390625000000000
sqrt(b) = 1.116084933280944824218750000000
Bibliography
- How to square floats accurately and efficiently on the ST231 integer processor.
Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Christophe Monat, and Guillaume Revy.
Accepted to ARITH'20, Tuebingen, Germany, 25-27 July 2011.
- Techniques and tools for implementing IEEE 754 floating-point arithmetic on VLIW integer processors.
Christian Bertin, Claude-Pierre Jeannerod, Jingyan Jourdan-Lu, Hervé Knochel, Christophe Monat, Christophe Mouilleron, Jean-Michel Muller, and Guillaume Revy.
In 4th International Workshop on Parallel and Symbolic Computation (PASCO'2010), Grenoble, France, 21-23 July 2010.
- Implementation of binary floating-point arithmetic on embedded integer processors - Polynomial evaluation-based algorithms and certified code generation.
Guillaume Revy.
Ph.D. Thesis, Université de Lyon - École Normale Supérieure de Lyon, France, 1 December 2009.
- Optimizing correctly-rounded reciprocal square roots for embedded VLIW cores.
Claude-Pierre Jeannerod and Guillaume Revy.
In Proceedings of the 43rd Asilomar Conference on Signals, Systems, and Computers, Asilomar (USA), November 2009 (Copyright 2001 SS&C).
- A new binary floating-point division algorithm and its software implementation on the ST231 processor.
Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, Guillaume Revy, and Gilles Villard.
In J.D. Bruguera, M. Cornea, D. DasSarma, and J. Harrison, editors, 19th IEEE Symposium on Computer Arithmetic (ARITH'19), pages 95-103, Portland, USA, June 2009.
- Computing floating-point square roots via bivariate polynomial evaluation.
Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, and Guillaume Revy.
In J.D. Bruguera, M. Cornea, D. DasSarma, and J. Harrison, editors, IEEE Transactions on Computers, Special Section on Computer Arithmetic, volume 60(2), pages 214-227, IEEE Computer Society, February 2011.
- Faster floating-point square root for integer processors.
Claude-Pierre Jeannerod, Hervé Knochel, Christophe Monat, and Guillaume Revy.
In 2nd IEEE International Symposium on Industrial Embedded Systems (SIES'2007), pages 324-327, Lisbon, Portugal, July 2007.
